৪৯তম বিসিএস ⎯ তথ্য ও যোগাযোগ প্রযুক্তি [২৮১]

Digital logic systems work with discrete signals — usually represented by binary values (0 and 1).

These binary values correspond to:

•LOW (0) and HIGH (1) voltage levels
•Logical FALSE and TRUE
•OFF and ON states

Source: Digital Design (6th Global Edition) by M. Morris Mano

A+B represents an OR gate. The overline ( ‾  ) indicates NOT, so it’s a NOR gate.

Boolean Expression:
                     
Step-by-Step Reasoning:

Identify the operation:

'+' in Boolean algebra means OR operation.
So, A+B means A OR B.

Understand the bar (overline):

The bar ' ‾ ' represents NOT (logical negation).

So, means “NOT (A OR B)”.

∴ A NOR gate performs the logical OR followed by a NOT.

Truth table: output is 1 only when both inputs are 0.


Source: Thomas Floyd, “Digital Fundamentals,” 11th Edition, Pearson.

A sequential circuit is an interconnection of flip-flops and gates. The output of a sequential circuit is a function of the inputs and the present state of its flip-flops. The present state of the flip-flops is a function of previous inputs; hence, sequential circuits have memory.

Examples of sequential circuits:

Counters, Shift registers, Flip-flop–based state machines, Clocks in digital systems.

Source: Digital Logic and Computer Design by M. Morris Mano

The XOR gate compares two binary inputs and outputs 1 if and only if the inputs are different.
Its Boolean expression is:
                       
Truth Table:

 
Therefore, the XOR gate outputs 1 only when A ≠ B.



Source: Digital Logic and Computer Design by M. Morris Mano

An AND gate outputs 1 (HIGH) only when all its inputs are 1 (HIGH).

If any input is 0 (LOW), the output will be 0 (LOW).

Truth table for a 2-input AND gate:


Source: Data Communications and Networking — Behrouz A. Forouzan

For n variables, minterms = 2ⁿ. For n = 4 ∴ 2⁴ = 16.

A minterm is a product (AND) term in Boolean algebra where each variable appears exactly once, either in true form or complemented.
Each unique combination of input variables corresponds to one minterm.

With 4 variables (A, B, C, D), there are 2⁴ = 16 possible input combinations, so 16 minterms.


Source: Digital Logic and Computer Design by M. Morris Mano

A decoder with n inputs has 2ⁿ outputs. Here, 3 inputs → 2³ = 8 outputs.

In an n-to-2ⁿ line decoder:
n = number of selection inputs (variables)

2ⁿ= number of output lines

For n=4:
2⁴=16

So, 4 inputs → 16 outputs.

Note: In practical ICs, there’s often an additional enable input, so the total physical input pins may be 4+1=5, but logically it’s still called a 4-to-16 decoder because there are 4 selection lines.


Source: Digital Logic and Computer Design by M. Morris Mano

An encoder converts an active input line into a binary code.
A decoder does the reverse; it takes a binary code and activates one specific output line corresponding to that code.

Example:
Encoder: If input line D5 is active, the output binary code is 101.

Decoder: If the input binary code is 101, output line D5 becomes active.


Source: Digital Logic and Computer Design by M. Morris Mano

In binary, input D₂ corresponds to 10. The encoder converts the active input line into its binary code.

A 4-to-2 binary encoder converts one active input line into a 2-bit binary output.
For a priority encoder with one active input at a time:

?₀=?₁+?₃

Y₁=D₂+D₃

​Truth Table:
​

So if D₂ = 1, the output is 10 (Y1 = 1, Y0 = 0).



Source: Digital Logic Design by M. Morris Mano

A decoder takes 'n' binary input lines and activates exactly one of ' 2^? ' output lines.
In memory address decoding, the binary address from the CPU is applied to the decoder inputs. The decoder then enables only the memory location (or chip) corresponding to that address, ensuring that only the addressed memory responds to the read/write signal.

This is one of the most common real-world uses of decoders in digital systems such as microprocessors and microcontrollers.


Source: Digital Logic Design by M. Morris Mano

A multiplexer (MUX) needs a certain number of selection lines (n) based on the formula:
Number of inputs = 2^?

If n = 4 selection lines:

Then Inputs = 2⁴ = 16
This means a 16:1 multiplexer requires 4 selection lines to choose one of its 16 input signals.

Source:  Digital Design (6th Global Edition) by M. Morris Mano

The number of selection lines (n) in a multiplexer is related to the number of inputs by the formula:

Number of inputs =2^?

If there are 2 selection lines:
2²=4 inputs

This means a multiplexer with 4 inputs, 1 output, and 2 selection lines is a 4-to-1 multiplexer.
It selects one of the 4 inputs based on the binary value present on the 2 selection lines.



Source: Digital Design (6th Global Edition) by M. Morris Mano

When the data input of a demultiplexer is held at logic 1, it behaves like a decoder because the select lines directly determine which single output is activated.

IC 74153 is a dual 4:1 multiplexer, widely used in digital electronics.

74153 is a dual 4-to-1 multiplexer IC, meaning it contains two independent 4:1 multiplexers in one package.

It has 4 inputs per multiplexer, 2 selection lines, and 1 output for each section.

Commonly used in digital circuits for data selection.

74138 → 3-to-8 line decoder, not a multiplexer.

74244 → Octal buffer/driver, used for bus driving, not data selection.

7474 → Dual D-type flip-flop, used for data storage, not multiplexing.

Quick Identification Tricks
Multiplexer (MUX) → “n-to-1” (n inputs, 1 output). Selection lines choose the input. IC numbers often end in 51, 53.
Decoder → “n-to-m” (n inputs, m outputs). Converts binary input to a single active output. IC numbers often end in 38, 39.
Flip-Flop → Has clock, Q, and Q̅ outputs. Stores 1 bit. IC numbers often end in 74, 76.
Octal Buffer/Line Driver → “8-to-8” (8 inputs, 8 outputs). Used for driving buses and strengthening signals. Often tri-state outputs. IC numbers often end in 44 (e.g., 74244) or 45 (74245 for bidirectional).

Source: Digital Logic & Computer Design by M. Morris Mano 

A multiplexer (MUX) is a combinational logic circuit that takes multiple input lines and channels only one selected input to the output, based on the binary value present on its selection lines.
It functions like an electronic switch, allowing digital systems to efficiently route data from many sources to a single destination. 

Source: Digital Logic and Computer Design by M. Morris Mano

A demultiplexer (DEMUX) takes one input signal and routes it to one of several outputs, based on the values of its selection lines.
A multiplexer (MUX) performs the opposite function — it takes multiple input signals and selects only one to send to the output, based on the selection lines.

Function Relationship:
                     
In essence:

MUX = Combines multiple data lines into one (opposite of DEMUX).
DEMUX = Splits one data line into multiple outputs (opposite of MUX).

Source: Digital Logic & Computer Design by M. Morris Mano

A JK flip-flop has two inputs: J (set) and K (reset).

When J = K = 1, the flip-flop toggles its output (changes from 0 to 1 or 1 to 0) on every active clock edge.

If we connect the J and K inputs together and feed them with the same signal, they will always be equal. This makes the JK flip-flop behave exactly like a T (toggle) flip-flop, where:

Thus, connecting J and K together transforms the JK flip-flop into a T flip-flop.

Source: Data Communications and Networking by Behrouz A. Forouzan

The D flip-flop is often called a data latch or delay flip-flop because it stores the value present at the D (data) input at the moment of the clock edge and then holds (latches) that value until the next clock event.

It eliminates the undefined condition of the SR flip-flop by ensuring that there is only one input (D) which directly determines the stored bit.

When the clock is active, Q takes the value of D. When the clock is inactive, the stored value remains unchanged.

This "latching" of the data input is why it is called a data latch

Source: Data Communications and Networking by Behrouz A. Forouzan

The T (Toggle) flip-flop changes its output state (toggles) on each active clock edge (rising or falling, depending on design).

If the input T = 1, every time the clock pulses, the output Q flips from 0 → 1 or 1 → 0.

This means the output frequency is exactly half of the input clock frequency — hence frequency division by 2.

By cascading multiple T flip-flops, you can achieve frequency division by powers of 2.

1st flip-flop → divide by 2

2nd flip-flop → divide by 4

3rd flip-flop → divide by 8
And so on…

∴ T flip-flop toggles output on each clock pulse, effectively dividing input frequency by 2.

Source: Data Communications and Networking by Behrouz A. Forouzan

A master–slave JK flip-flop consists of two JK flip-flops connected in series:

Master stage → Receives input first.
Slave stage → Follows the master after a half clock cycle.

Operation:
The master is enabled (active) when the clock signal is HIGH.
The slave is enabled when the clock signal is LOW.

This arrangement prevents race conditions in JK flip-flops and ensures output changes only once per clock cycle.

Source: Digital Logic & Computer Design by M. Morris Mano

An SR flip-flop (Set–Reset flip-flop) has two inputs: S (Set) and R (Reset).

Normal operation:
S = 1, R = 0 → Output Q is set to 1.
S = 0, R = 1 → Output Q is reset to 0.
S = 0, R = 0 → Output retains its previous state.

Forbidden state:

S = 1, R = 1 → Both outputs Q and Q̅ become 0 simultaneously.

This violates the rule that Q and Q̅ must always be complements, leading to an undefined or unstable condition.

For this reason, this input combination is called the forbidden state (or invalid state).
∴ Both inputs high cause an undefined or forbidden output in an SR flip-flop.


Source: Data Communications and Networking by Behrouz A. Forouzan

Explanation:
A digital counter is a sequential circuit designed to count the number of input pulses and represent the count in binary (or another number system).

Counters are commonly made from a series of flip-flops connected in a specific manner.

Working principle:

Each incoming pulse changes the state of the counter.
The count is stored temporarily within the flip-flops.

Applications:

Measuring time (digital clocks, timers)
Event counting (frequency counters, traffic counters)
Memory addressing (as address counters in computers)

Key point:
The main job is counting — it does not generate clock pulses, perform arithmetic like an ALU, or convert analog to digital.

Example:
A 4-bit binary counter can count from 0000 (0) to 1111 (15) before wrapping around to 0000 again.

Counters count the number of input pulses and store the result as a binary number.


Source: Data Communications and Networking by Behrouz A. Forouzan

In a binary counter, each flip-flop stores one bit.
A 4-bit counter must represent values from 0 (0000) to 15 (1111), which is 2⁴ = 16 states.

Therefore, we need 4 flip-flops, one for each bit of the binary number.

Formula:
Number of flip-flops = Number of bits in the counter

So,
2-bit counter → 2 flip-flops → counts 0–3
3-bit counter → 3 flip-flops → counts 0–7
4-bit counter → 4 flip-flops → counts 0–15 

Example:
4 flip-flops connected in series can be arranged as:
Ripple counter (asynchronous) — slower but simpler 
and Synchronous counter — all flip-flops share the same clock



Source: Digital Logic & Computer Design by M. Morris Mano

In a binary counter, the number of states is determined by:

Number of states=2ⁿ

where
n = number of flip-flops (bits).

For a 3-bit counter:
2³=8 states

These states range from 000 to 111 in binary (0 to 7 in decimal).

Example:
000 → 0
001 → 1
010 → 2
011 → 3
100 → 4
101 → 5
110 → 6
111 → 7

Source: Digital Design (6th Global Edition) by M. Morris Mano

T (Toggle) flip-flop is the most commonly used in counters because of
1. On every active clock edge, it toggles its output.
2. This toggling behavior naturally produces binary sequences used in counting.
3. A T flip-flop can be implemented by connecting J and K inputs of a JK flip-flop together, or by modifying a D flip-flop.

Using multiple T flip-flops in series creates ripple counters or synchronous counters.

Others:

SR flip-flop → Has an invalid (forbidden) state when S=1 and R=1, not ideal for counters.
D flip-flop → Used more in registers and data storage, though it can be adapted for counters.
JK flip-flop → Flexible and can be used for counters, but when used for counting, it’s usually wired to act like a T flip-flop.

Source: Digital Logic & Computer Design by M. Morris Mano

In a ripple counter—also known as an asynchronous counter—the Q output of each flip-flop is connected to the clock input of the next. The first flip-flop receives the external clock signal, and its Q output then "ripples" through to clock the subsequent stages

Asynchronous counters (also called ripple counters):
♦ Only the first flip-flop is driven by the external clock.
♦ The output of each flip-flop acts as the clock for the next stage.
♦ This causes a ripple effect and propagation delays.

Synchronous counters:
♦ All flip-flops receive the clock signal simultaneously.
♦ No ripple delay → faster and more reliable at high frequencies.

So, the main difference lies in how the clock is applied.

Asynchronous → clock cascades through outputs of previous flip-flops.
Synchronous → all flip-flops share the same clock directly.

Source: Data Communications and Networking by Behrouz A. Forouzan

♦ Natural binary sequence means counting in the order:
000, 001, 010, 011, 100, 101, 110, 111 (for 3 bits).

♦ Asynchronous counters and synchronous counters both can be designed to count in natural binary order.

♦ Up counters count forward in natural binary order.

Ring counter:
• A type of counter in which the output is a shift register with only one flip-flop set to 1 at a time and the rest 0.
• The 1 circulates around the register in a fixed pattern.

Example (4-bit ring counter sequence):
1000 → 0100 → 0010 → 0001 → 1000

Does not follow binary counting — instead, it produces a cyclic, non-binary pattern.

Source: Digital Logic & Computer Design by M. Morris Mano

A binary counter with n bits can represent 2ⁿ distinct states.

For n = 6, the total number of states is:
2⁶=64
These states range from binary 000000 (decimal 0) to binary 111111 (decimal 63).

Therefore, a 6-bit counter counts from 0 to 63.

Applications of a 6-bit counter:
• Digital clocks (seconds: 0–59, minutes: 0–59)
• Event counting
• Frequency division (by 64)
• Address sequencing in memory


Source: Data Communications and Networking by Behrouz A. Forouzan.